Difference between revisions of "Core Coupled Memory (CCMRAM)"

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[[Category:STM32]][[Category:STM32 Hardware]][[Category:STM32 Documentation]][[Category:STM32 Development]]{{metadesc|STM32 Core Coupled Memory - CCMRAM}}
 
[[Category:STM32]][[Category:STM32 Hardware]][[Category:STM32 Documentation]][[Category:STM32 Development]]{{metadesc|STM32 Core Coupled Memory - CCMRAM}}
 
Some [[STM32]] [[MCU]]s include a feature called [[CCMRAM]] ([[Core Coupled Memory]]), which is separate from the regular SRAM region.
 
Some [[STM32]] [[MCU]]s include a feature called [[CCMRAM]] ([[Core Coupled Memory]]), which is separate from the regular SRAM region.
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== Video ==
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We have created a tutorial video describing this approach.  The video can be viewed here: [https://www.youtube.com/watch?v=Eh7Szh-K-u8 https://www.youtube.com/watch?v=pvekb2h8_og].
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{{#ev:youtube|pvekb2h8_og}}
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== Official documentation ==
  
 
According to the [https://www.st.com/resource/en/datasheet/dm00037051.pdf datasheet], the memory in [[STM32F405]] is:
 
According to the [https://www.st.com/resource/en/datasheet/dm00037051.pdf datasheet], the memory in [[STM32F405]] is:

Revision as of 02:35, 28 November 2024

Some STM32 MCUs include a feature called CCMRAM (Core Coupled Memory), which is separate from the regular SRAM region.

Video

We have created a tutorial video describing this approach. The video can be viewed here: https://www.youtube.com/watch?v=pvekb2h8_og.

Official documentation

According to the datasheet, the memory in STM32F405 is:

STM32F405 Memory.png

In the block diagram it is shown like this:

STM32F405 Memory Architecture.png

It is worth noticing a few things. As the name implies this RAM is connected directly to the MCU core but separate from the AHB bus matrix. Looking at the bus matrix:

STM32F405 Bus Matrix.png

As a result, the CCMRAM can not be used with DMA.

Usage Examples