Difference between revisions of "Sipeed Longan Nano"
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[[Category:Development Board]][[Category:RISC-V]]{{metadesc|Sipeed Longan Nano RISC-V Development Board}}[[File:Sipeed Longan Nano - top view aligned.jpg|thumb]] | [[Category:Development Board]][[Category:RISC-V]]{{metadesc|Sipeed Longan Nano RISC-V Development Board}}[[File:Sipeed Longan Nano - top view aligned.jpg|thumb]] | ||
| − | The [[Sipeed Longan Nano]] is a development board built around a [[GD32VF103xx]] [[MCU]]. The [[GD32VF103xx]] is a [[GigaDevice]] [[MCU]] with a [[RISC-V]] core and an architecture which generally assembles a [[ | + | The [[Sipeed Longan Nano]] is a development board built around a [[GD32VF103xx]] [[MCU]]. The [[GD32VF103xx]] is a [[GigaDevice]] [[MCU]] with a [[RISC-V]] core and an architecture which generally assembles a [[STM32]] [[MCU]]. |
== Pinout == | == Pinout == | ||
Revision as of 10:09, 27 October 2021
The Sipeed Longan Nano is a development board built around a GD32VF103xx MCU. The GD32VF103xx is a GigaDevice MCU with a RISC-V core and an architecture which generally assembles a STM32 MCU.
Pinout
