Difference between revisions of "CH32V307"

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[[Category:CH32]][[Category:RISC-V]][[Category:CH32V307]][[Category:MCU]]{{metadesc|CH32V307xx RISC-V MCU}}
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[[Category:CH32]][[Category:RISC-V]][[Category:CH32V307]][[Category:MCU]]{{metadesc|CH32V307xx RISC-V MCU documentation}}
  
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== Miscellaneous Links ==
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== Development Notes ==
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* [[CH32V307-DAC | Digital-to-Analog Converter]]
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* [[CH32V307-ADC | Analog-to-Digital Converter]]
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* [[CH32V307-Execution_Speed | Execution Speed]]
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== External Links ==
  
 
* [https://ipfs.subutai.io/ipfs/QmUu3BmKAuAH8z5S1dKns7gamu3eQ1LqH4wS9mp8udep23/CH32V20x_30xDS0.PDF CH32V20x/CH32V30x Datasheet]
 
* [https://ipfs.subutai.io/ipfs/QmUu3BmKAuAH8z5S1dKns7gamu3eQ1LqH4wS9mp8udep23/CH32V20x_30xDS0.PDF CH32V20x/CH32V30x Datasheet]
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* [http://wch-ic.com/downloads/file/262.html?time=2022-06-08%2000:02:47&code=WzZMnejfNpLPWjULTKIJgnHgBBt3toKKi1ZTdFxZ CH549 Datasheet]
 
* [http://wch-ic.com/downloads/file/262.html?time=2022-06-08%2000:02:47&code=WzZMnejfNpLPWjULTKIJgnHgBBt3toKKi1ZTdFxZ CH549 Datasheet]
 
* [https://github.com/openwch?tab=repositories OpenWCH]
 
* [https://github.com/openwch?tab=repositories OpenWCH]
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== Development Notes ==
 
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=== DAC ===
 
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* The output impedance is a concern. Without the Output Buffer enabled, >100kohm impedance for the load is needed. Even WITH Output Buffer enabled, a 1kohm load is not really possible, both high and low end of range is not reached, which is a bit strange. 10kohm hasn't been tested yet, but datasheet indicates that a 5kohm load should be fine.
 
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* For fastest write to DAC output, this is used;
 
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<nowiki>
 
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DAC->RD12BDHR = dac_value1 + (dac_value2 << 16);
 
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</nowiki>
 
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* Simple initialization is;
 
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<nowiki>
 
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    RCC_APB1PeriphClockCmd(RCC_APB1Periph_DAC, ENABLE );
 
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    DAC_InitTypeDef DAC_InitType={0};
 
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    DAC_InitType.DAC_Trigger=DAC_Trigger_None;
 
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    DAC_InitType.DAC_WaveGeneration=DAC_WaveGeneration_None;
 
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    DAC_InitType.DAC_OutputBuffer=DAC_OutputBuffer_Enable;
 
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    DAC_Init(DAC_Channel_1,&DAC_InitType);
 
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    DAC_Init(DAC_Channel_2,&DAC_InitType);
 
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    DAC_Cmd(DAC_Channel_1, ENABLE);
 
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    DAC_Cmd(DAC_Channel_2, ENABLE);
 
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</nowiki>
 
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=== Execution Speed ===
 
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While executing some tests, I noticed that an extra layer of function call added much more time than should be the case.
 
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In the '''TIM7_IRQHandler''' I did
 
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<nowiki>
 
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__attribute__((interrupt("WCH-Interrupt-fast"))) void TIM7_IRQHandler() {
 
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    GET_INT_SP();
 
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    rt_interrupt_enter();
 
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    GPIO_WriteBit(GPIOA, GPIO_Pin_7, Bit_SET);
 
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    GPIO_WriteBit(GPIOA, GPIO_Pin_7, Bit_RESET);
 
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    set_testpoint(0);
 
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    clear_testpoint(0);
 
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    demiurge_tick();
 
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    TIM7->INTFR = 0;
 
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    rt_interrupt_leave();
 
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    FREE_INT_SP();
 
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}
 
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</nowiki>
 
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and the '''set_testpoint(0)''' and '''clear_testpoint(0)''' functions as follows;
 
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<nowiki>
 
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void set_testpoint(int point)
 
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{
 
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    GPIO_WriteBit(GPIOA, GPIO_Pin_7, Bit_SET);
 
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}
 
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void clear_testpoint(int point)
 
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{
 
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    GPIO_WriteBit(GPIOA, GPIO_Pin_7, Bit_RESET);
 
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}
 
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</nowiki>
 
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It is clear that there is literally only one extra call. In assembler we can see that the compiler has not inlined any of this code;
 
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  21                    __attribute__((interrupt("WCH-Interrupt-fast"))) void TIM7_IRQHandler() {
 
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  22 002c 73110134          GET_INT_SP();
 
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  23                        rt_interrupt_enter();
 
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  33                            csrrw sp,mscratch,sp
 
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  34                    # 0 "" 2
 
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  35                    #NO_APP
 
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  36 0030 37140140              li      s0,1073811456
 
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  37 0034 97000000              call    rt_interrupt_enter
 
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  37      E7800000
 
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  38 003c 13050480              addi    a0,s0,-2048
 
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  39 0040 0546                  li      a2,1
 
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  40 0042 93050008              li      a1,128
 
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  41 0046 97000000              call    GPIO_WriteBit
 
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  41      E7800000
 
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  42 004e 0146                  li      a2,0
 
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  43 0050 93050008              li      a1,128
 
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  44 0054 13050480              addi    a0,s0,-2048
 
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  45 0058 97000000              call    GPIO_WriteBit
 
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  45      E7800000
 
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  46 0060 0145                  li      a0,0
 
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  47 0062 97000000              call    set_testpoint
 
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  47      E7800000
 
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  48 006a 0145                  li      a0,0
 
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  49 006c 97000000              call    clear_testpoint
 
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  49      E7800000
 
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  50 0074 97000000              call    demiurge_tick
 
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  50      E7800000
 
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  51 007c B7170040              li      a5,1073745920
 
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  52 0080 23980740              sh      zero,1040(a5)
 
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  53 0084 97000000              call    rt_interrupt_leave
 
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  53      E7800000
 
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-------
 
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  29                    set_testpoint:
 
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  30 0000 17030000              call    t0,__riscv_save_0
 
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  30      E7020300
 
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  31 0008 37150140              li      a0,1073811456
 
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  32 000c 0546                  li      a2,1
 
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  33 000e 93050008              li      a1,128
 
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  34 0012 13050580              addi    a0,a0,-2048
 
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  35 0016 97000000              call    GPIO_WriteBit
 
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  35      E7800000
 
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  36 001e 17030000              tail    __riscv_restore_0
 
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  36      67000300
 
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  38                            .section        .text.clear_testpoint,"ax",@progbits
 
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  39                            .align  1
 
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  40                            .globl  clear_testpoint
 
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  42                    clear_testpoint:
 
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  43 0000 17030000              call    t0,__riscv_save_0
 
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  43      E7020300
 
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  44 0008 37150140              li      a0,1073811456
 
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  45 000c 0146                  li      a2,0
 
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  46 000e 93050008              li      a1,128
 
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  47 0012 13050580              addi    a0,a0,-2048
 
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  48 0016 97000000              call    GPIO_WriteBit
 
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  48      E7800000
 
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  49 001e 17030000              tail    __riscv_restore_0
 
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  49      67000300
 
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But on the oscilloscope, I get a 70ns pulse first and a 220ns pulse there after. So why does
 
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  46 0060 0145                  li      a0,0
 
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  47 0062 97000000              call    set_testpoint
 
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take 150ns to execute?  For the '''GPIO_WriteBit''' we have 5 32-bit and 1 16-bit instruction, and inside '''GPIO_WriteBit''' we get 3 assembly instructions. At 144MHz, each fetch cycle is ~7ns, so 7*9 = 63ns which is very close to what I observe. So the
 
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  li a0,0
 
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  call set_testpoint
 
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should only take 14 or maybe 21 ns, not 150ns!!!
 
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'''So why is this happening??'''
 
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Hypotheses
 
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# Different memory types, fetch happening at different speeds. Perhaps because the code is inside a IRQ Handler.
 
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# Because it is Saturday and was raining earlier.
 

Latest revision as of 03:18, 12 July 2022


Development Notes

External Links

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