Difference between revisions of "Core Coupled Memory"
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[[File:STM32F405 Memory.png|400px]] | [[File:STM32F405 Memory.png|400px]] | ||
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| + | In the block diagram it is shown like this: | ||
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| + | [[File:STM32F405 Memory Architecture.png|600px]] | ||
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| + | It is worth noticing a few things. As the name implies this RAM is connected directly to the [[MCU]] core but separate from the AHB bus matrix. Looking at the bus matrix: | ||
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| + | [[File:STM32F405 Bus Matrix.png|600px]] | ||
Revision as of 00:37, 2 November 2024
Some STM32 MCUs include a feature called CCMRAM (Core Coupled Memory), which is separate from the regular SRAM region.
According to the datasheet, the memory in STM32F405 is:
In the block diagram it is shown like this:
It is worth noticing a few things. As the name implies this RAM is connected directly to the MCU core but separate from the AHB bus matrix. Looking at the bus matrix:
