Difference between revisions of "Core Coupled Memory"

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According to the [https://www.st.com/resource/en/datasheet/dm00037051.pdf datasheet], the memory in [[STM32F405]] is:
 
According to the [https://www.st.com/resource/en/datasheet/dm00037051.pdf datasheet], the memory in [[STM32F405]] is:
  
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<div class="res-img">
 
[[File:STM32F405 Memory.png|400px]]
 
[[File:STM32F405 Memory.png|400px]]
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</div>
  
 
In the block diagram it is shown like this:
 
In the block diagram it is shown like this:
  
[[File:STM32F405 Memory Architecture.png|600px]]
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<div class="res-img">
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[[File:STM32F405 Memory Architecture.png|800px]]
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</div>
  
 
It is worth noticing a few things.  As the name implies this RAM is connected directly to the [[MCU]] core but separate from the AHB bus matrix.  Looking at the bus matrix:
 
It is worth noticing a few things.  As the name implies this RAM is connected directly to the [[MCU]] core but separate from the AHB bus matrix.  Looking at the bus matrix:
  
[[File:STM32F405 Bus Matrix.png|600px]]
+
<div class="res-img">
 +
[[File:STM32F405 Bus Matrix.png|800px]]
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</div>
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== Usage Examples ==
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* [[STM32 FreeRTOS|Using CCMRAM for FreeRTOS Heap]]

Latest revision as of 01:22, 2 November 2024

Some STM32 MCUs include a feature called CCMRAM (Core Coupled Memory), which is separate from the regular SRAM region.

According to the datasheet, the memory in STM32F405 is:

STM32F405 Memory.png

In the block diagram it is shown like this:

STM32F405 Memory Architecture.png

It is worth noticing a few things. As the name implies this RAM is connected directly to the MCU core but separate from the AHB bus matrix. Looking at the bus matrix:

STM32F405 Bus Matrix.png

Usage Examples