Difference between revisions of "SEC01"
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[[Category:STM32]][[Category:STM32World]][[Category:Work in progress]]{{metadesc|STM32World Security and Encryption}} | [[Category:STM32]][[Category:STM32World]][[Category:Work in progress]]{{metadesc|STM32World Security and Encryption}} | ||
| + | [[SEC01]] is a [[:Category:Work in progress|planned]] [[STM32World]] board containing a few different security ICs. | ||
| + | |||
== Security ICs == | == Security ICs == | ||
| − | === | + | === ATECC608(A/B) === |
| − | Microchip Security Verification / Encryption IC available at JLCPCB (part no: C17350254) at $2.00. | + | Microchip Security Verification / Encryption IC available at JLCPCB (part no: C616908 (ATECC608A) or C17350254 (ATECC608B)) at $2.00. |
==== Features ==== | ==== Features ==== | ||
• Cryptographic Co-Processor with Secure Hardware-Based Key Storage: | • Cryptographic Co-Processor with Secure Hardware-Based Key Storage: | ||
| − | + | ** Protected storage for up to 16 keys, certificates or data | |
• Hardware Support for Asymmetric Sign, Verify, Key Agreement: | • Hardware Support for Asymmetric Sign, Verify, Key Agreement: | ||
| − | + | ** ECDSA: FIPS186-3 Elliptic Curve Digital Signature | |
| − | + | ** ECDH: FIPS SP800-56A Elliptic Curve Diffie-Hellman | |
| − | + | ** NIST Standard P256 Elliptic Curve Support | |
• Hardware Support for Symmetric Algorithms: | • Hardware Support for Symmetric Algorithms: | ||
| − | + | ** SHA-256 & HMAC Hash including off-chip context save/restore | |
| − | + | ** AES-128: Encrypt/Decrypt, Galois Field Multiply for GCM | |
• Networking Key Management Support: | • Networking Key Management Support: | ||
| − | + | ** Turnkey PRF/HKDF calculation for TLS 1.2 & 1.3 | |
| − | + | ** Ephemeral key generation and key agreement in SRAM | |
| − | + | ** Small message encryption with keys entirely protected | |
• Secure Boot Support: | • Secure Boot Support: | ||
| − | + | ** Full ECDSA code signature validation, optional stored digest/signature | |
| − | + | ** Optional communication key disablement prior to secure boot | |
| − | + | ** Encryption/Authentication for messages to prevent on-board attacks | |
• Internal High-Quality NIST SP 800-90A/B/C Random Number Generator (RNG) | • Internal High-Quality NIST SP 800-90A/B/C Random Number Generator (RNG) | ||
• Two High-Endurance Monotonic Counters | • Two High-Endurance Monotonic Counters | ||
• Unique 72-Bit Serial Number | • Unique 72-Bit Serial Number | ||
• Two Interface Options Available: | • Two Interface Options Available: | ||
| − | + | ** High-Speed Single Wire Interface with One GPIO Pin | |
| − | + | ** 1 MHz Standard I2C Interface | |
• 1.8V to 5.5V IO Levels, 2.0V to 5.5V Supply Voltage | • 1.8V to 5.5V IO Levels, 2.0V to 5.5V Supply Voltage | ||
• Two Temperature Ranges Available: | • Two Temperature Ranges Available: | ||
| − | + | ** Standard Industrial Temperature Range: -40℃ to +85℃ | |
| − | + | ** Extended Industrial Temperature Range: -40℃ to +100℃ | |
• <150 nA Sleep Current | • <150 nA Sleep Current | ||
• Packaging Options | • Packaging Options | ||
| − | + | ** 8-pad UDFN, 8-lead SOIC and 3-Lead Contact Package Options | |
| − | + | ** Die-on-Tape and Reel and WLCSP for Qualified Customers (Contact Microchip Sales) | |
== Miscellaneous Links == | == Miscellaneous Links == | ||
* [https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2311141807_Microchip-Tech-ATECC608B-MAVDA-S_C17350254.pdf ATECC608B CryptoAuthenticatn Device Summary Data Sheet] | * [https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2311141807_Microchip-Tech-ATECC608B-MAVDA-S_C17350254.pdf ATECC608B CryptoAuthenticatn Device Summary Data Sheet] | ||
| + | * [https://stm32world.com/images/9/96/Microchip_ATECC508A_Datasheet.pdf ATECC508A Complete Datasheet] | ||
Latest revision as of 11:49, 20 June 2024
SEC01 is a planned STM32World board containing a few different security ICs.
Security ICs
ATECC608(A/B)
Microchip Security Verification / Encryption IC available at JLCPCB (part no: C616908 (ATECC608A) or C17350254 (ATECC608B)) at $2.00.
Features
• Cryptographic Co-Processor with Secure Hardware-Based Key Storage:
- Protected storage for up to 16 keys, certificates or data
• Hardware Support for Asymmetric Sign, Verify, Key Agreement:
- ECDSA: FIPS186-3 Elliptic Curve Digital Signature
- ECDH: FIPS SP800-56A Elliptic Curve Diffie-Hellman
- NIST Standard P256 Elliptic Curve Support
• Hardware Support for Symmetric Algorithms:
- SHA-256 & HMAC Hash including off-chip context save/restore
- AES-128: Encrypt/Decrypt, Galois Field Multiply for GCM
• Networking Key Management Support:
- Turnkey PRF/HKDF calculation for TLS 1.2 & 1.3
- Ephemeral key generation and key agreement in SRAM
- Small message encryption with keys entirely protected
• Secure Boot Support:
- Full ECDSA code signature validation, optional stored digest/signature
- Optional communication key disablement prior to secure boot
- Encryption/Authentication for messages to prevent on-board attacks
• Internal High-Quality NIST SP 800-90A/B/C Random Number Generator (RNG) • Two High-Endurance Monotonic Counters • Unique 72-Bit Serial Number • Two Interface Options Available:
- High-Speed Single Wire Interface with One GPIO Pin
- 1 MHz Standard I2C Interface
• 1.8V to 5.5V IO Levels, 2.0V to 5.5V Supply Voltage • Two Temperature Ranges Available:
- Standard Industrial Temperature Range: -40℃ to +85℃
- Extended Industrial Temperature Range: -40℃ to +100℃
• <150 nA Sleep Current • Packaging Options
- 8-pad UDFN, 8-lead SOIC and 3-Lead Contact Package Options
- Die-on-Tape and Reel and WLCSP for Qualified Customers (Contact Microchip Sales)